Types of MIS Capacitor C-V Curves

There are three main frequencies involved in the generation and interpretation of C-V curves:

1. Capacitance sensor measurement frequency (approximately 1 GHz)
2. Lock-in amplifier reference frequency (5 kHz–100 kHz)
3. “DC” bias sweep frequency used for C-V curve acquisition

In general, a signal is termed high frequency (or low frequency) if its period is shorter (or longer) than the delay time associated with the generation of minority carriers, that is, to fill an inversion layer. The three relevant type of C-V curves are discussed next.

Low frequency C-V Curves

If all three frequencies (a, b and c, above) are low enough, minority-carrier generation brings the carrier distribution to the long-term configuration. In a low frequency C-V curve, the capacitance in the inversion region is high, comparable to the accumulation capacitance. The capacitance in the inversion region is high because minority-carrier generation screens the potential variations across the buried depletion layer, effectively shorting it out as a resistor would so the equivalent circuit looks similar to the one for accumulation. Only the oxide capacitance is relevant.

High frequency C-V Curves

Here the excitation frequency (a) is high; and therefore minority carriers cannot screen the buried depletion layer. The other frequencies (b, c) should be low so that the inversion layer has time to develop as the tip-sample potential is changed. If (b) is not low, the slope measured is not appropriate to this type of curve, because the inversion layer population is not able to follow the lock-in dither voltage.

Deep-depletion C-V Curves

In this case all three frequencies are high, so the inversion layer population goes unchanged by minority-carrier generation. In this case, potentials at all three frequencies can drop across the depletion layer. Therefore: (1) the depletion-layer capacitance (in series with the oxide capacitance) is sensed in the inversion region; (2) the measured C-V curve slope, dC/dV, appropriately reflects the changing depletion-layer width with sweep voltage; (3) the sweep voltage modulates the depletion-layer width so the bottom edge moves deeper, sampling different doped regions. This is the origin of the pulsed C-V measurements used for device characterization which are used to infer the depth profile of dopants in a fabricated MOS capacitor.

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